The present invention relates to a plasma display panel for use in an image display device and the like and a manufacturing method thereof. More specifically, the present invention relates to a structure of a dielectric layer of a front panel installed in the plasma display panel and a manufacturing method thereof.
Since the plasma display panel (hereinafter, referred to as a “PDP”) is capable of achieving high definition and a large-size screen, it has been used for a large-size television or the like, for example, having a size of 65 inches or more. In recent years, the PDP's have been progressively applied to a high-definition television having scanning lines of two times or more than those of a conventionally known television of the NTSC system, and there has been a strong demand for their lower power consumption.
The PDP is provided with a front panel and a back panel in its basic structure. The front panel is usually provided with a front substrate, display electrodes formed on one surface of the front substrate as a stripe pattern, a dielectric layer that covers the display electrodes and serves as a capacitor, and a dielectric-protection layer formed on the dielectric layer. On the other hand, the back panel is provided with a back substrate, address electrodes formed on one surface of the back substrate as a stripe pattern, and an base dielectric layer that covers the address electrodes. On the base dielectric layer, a plurality of barrier ribs are formed as a stripe pattern. These barrier ribs are made in parallel with the address electrodes, and when viewed in a thickness direction of the back panel, these are disposed so that each address electrode is positioned between the adjacent barrier ribs. Phosphor layers that respectively emit red, green, and blue-colored light rays are successively formed in grooves, each formed among side walls of the adjacent barrier ribs and the base dielectric layer.
The PDP has a tightly-sealed structure in which the front panel and the back panel are disposed with their faces on which electrodes (display electrodes and address electrodes) are formed being opposed to each other, with their peripheral portions being sealed with a sealing member. In this tightly-sealed space formed by this tightly-sealed structure, a discharge gas such as neon (Ne) or xenon (Xe) is sealed with a pressure in a range of 53,000 Pa to 80,000 Pa, so as to form a discharge space. The PDP selectively applies an image signal voltage to the display electrode so that a gas discharge is generated in the discharge space, and ultraviolet rays, generated by the gas discharge, are allowed to excite the phosphor layers with the respective colors so as to emit visible light rays so that a color image is displayed.
In the PDP constructed as described above, the dielectric layer on the front panel is generally formed through processes in which, after a dielectric paste having glass frits of several micrometers is printed or applied onto one of the surfaces of the front substrate so as to cover the display electrode, the substrate is dried and fired at a temperature that is the softening point of the glass frit or more. Hereinafter, this method for forming a dielectric layer is referred to as a firing method.
On the other hand, it has been known that, in order to reduce the power consumption of the PDP, it is effective to reduce the dielectric constant of the dielectric layer of the front panel. In the above-mentioned firing method, however, since the glass frit needs to be fused at a low temperature, a glass material having a low melting point needs to be used. This glass material having a low melting point is poor in purity and has a dielectric constant as high as 10 or more. For this reason, the dielectric constant of the dielectric layer tends to be higher as a result.
As a method for lowering the dielectric constant of the dielectric layer, a method for forming the dielectric layer by using a sol-gel method is proposed. In this method, after a silicon compound is obtained by subjecting a metal alkoxide in a solvent to hydrolysis, the compound is heated to be subjected to a condensation polymerization reaction so that a dielectric layer mainly formed of silicon oxide is formed. In this method, since the glass frit needs not be fused, the dielectric layer can be formed at a low temperature so that this method is effective also from the viewpoint of production costs.
Moreover, as another method for lowering the dielectric constant of the dielectric layer, Patent Document 1 (JP 2008-27862 A) has proposed the following method. Patent Document 1 discloses the method in which the dielectric layer of the front panel is designed to have a two-layer structure having a fine particle layer and an insulating layer.
In the method for forming the dielectric layer by using the sol-gel method, however, cracks might be generated in the dielectric layer due to foreign matters that have given no adverse effects in the method for forming the dielectric layer by the firing method and irregularities on the display electrode or the like. In the case when a voltage is applied to the display electrode with cracks formed in the dielectric layer, defects such as a spark might be generated.
Moreover, in Patent Document 1, the fine particle layer has a structure in which silica fine particles are aggregated. That is, the fine particle layer is a porous layer with voids among the silica fine particles. For this reason, the porous layer is poor in adhesive property and strength, and upon forming an insulating layer on the fine particle layer, the porous layer tends to be easily separated by a stress given by the insulating layer. That is, the structure of Patent Document 1 raises an issue that the yield becomes poor. Moreover, it is difficult to ensure a uniform distribution of the voids, which causes another issue in which luminance irregularities tend to occur in the PDP.
Therefore, the present invention has been devised to improve the issues, and an object thereof is to provide a plasma display panel that can suppress generation of cracks in the dielectric layer, and also improve the yield, and a method for manufacturing such a panel.